An analysis of aliasing in built-in self test procedure
Jasa Barus · Calhoun: The Naval Postgraduate School Institutional Archive (Naval Postgraduate School) · 1991
This thesis investigates aliasing probability in Built-in Self Test (BIST) procedure, in which a Linear Feedback Shift Register (LFSR) is used as pseudo-random pattern generator, with a full adder as Circuit Under Test (CUT). The Signature Analyzer implements a Multiple Input Signature Register (MISR) as a test response compressor.