Analysis of Taylor-Kuznetsov memory using one-step majority logic decoder
Elsa Dupraz, David Declercq, Bane V. Vasic · 2015
This paper addresses the problem of constructing reliable memories from unreliable components. We consider the memory construction proposed by Taylor in which a codeword stored in a faulty memory is regularly updated by an LDPC decoder to overcome the memory degradation. We assume that the LDPC decoder used in the system is a faulty one-step majority logic decoder. Compared to [1], [2] which analyze only the faulty one-step majority logic decoder, we analyze here the reliability of the whole memory construction. We introduce a sequence of output errors probabilities at successive time instants and determine the properties and the fixed points of the sequence. From the fixed-point analysis, we define a threshold that predicts the noise level which can be tolerated for the memory to stay reliable. We finally represent the reliability regions of the Taylor-Kuznetsov memory with respect to the decoder noise parameters and validate the theoretical results with Monte-Carlo simulations.