Implementation of multiple-output functions using PQMDDs
Y. Iguchi, Tsutomu Sasao, Mikako Matsuura · 2002
A sequential realization of multiple-output logic functions is presented. A conventional sequential realization is based on SBDDs (shared reduced ordered Binary Decision Diagrams). In this paper, we propose PQMDD (Paged Quasi-reduced ordered Multi-valued Decision Diagram) as a new data structure. A function is represented by a PQMDD, and stored in memory. Dedicated control circuits traverse the PQMDD in parallel. We represent multiple-output function for benchmark functions by SBDDs and PQMDDs and compare the size of memory and computation time.