A low cost serious failure tolerance solution in unreliable NoCs

Letian Huang, Guangjun Li, Xiaofan Zhang, Zhiyong Guo · 2015

Faults may occur in numerous locations of a router in a Network on Chips (NoCs) platform, special in low power NoCs. Most of the researchers only focus on the effects of the faults in the data path. However, the effects in the control path may cause more seriously failure in NoC such as deadlock or livelock. In this paper, we analysis the probability of the serious failure in NoCs and propose a mechanism to reduce the failures. This mechanism is called LCEC, standing for four distinguishing characteristics of the proposed method as Low Cost Error Correct. The proposed mechanism is not limited to special types of faults or specific router components while it has the capability to tolerate faults by using simple error correct codes and scaling the clock frequency.

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