The flexibility of the QuickLogic FPGA architecture
Bret A. Small · Proceedings of WESCON '94 · 2002
The QuickLogic pASiC 1 architecture, gives the designer unprecedented flexibility for design, utilization and speed. The automatic placement and routing tools will compile a design using 100% of the logic and 110 resources. Designs entered in high-level description languages and run through many common logic synthesis tools still make effective use of the device resources, thanks to a fragmented logic cell in combination with an "expert" technology mapping algorithm. in addition to all this, the QuickLogic architecture provides speed. The newest.65 micron WildCat devices offer 50 MHz 16-bit accumulators, 160 MHz data path circuits, and 140 MHz counters. The high-speed, 100% routable, logic-efficient pASIC 1 architecture gives designers a highly flexible alternative for FPGA designs.>