Functional test generation of digital lsi/vlsi systems using machine symbolic execution technique (fault model, register transfer)
Tonysheng Lin · 1985
Functional testing is among the promising solution proposed in recent years for the challenging problems of testing modern digital LSI/VLSI systems. It is aimed at validating the correct operation of a digital system with respect to its functional specification. Functional test generation is performed before functional testing. In this dissertation, a functional test pattern generation algorithm is developed. This algorithm is explicit, systematic and practical. The whole research work consists of five related topics including theoretical development and computer experiment. First, a register transfer language specially designed for the functional description of a general digital system is defined. Second, a register-transfer (RT) level fault model quite different from the conventional gate-level stuck-at fault model is established and the fault collapsing analysis is performed for better test generation efficiency. Third, the technique of register-transfer-level symbolic execution is explored. The major problems are defined, analyzed, and solved. A register-transfer-level symbolic execution system is designed and implemented. Fourth, an overall RT-level test pattern generation algorithm is developed based on the RT-level fault model and the RT-level symbolic execution technique. The symbolic executions are performed on both fault-free and fault-injected machines for symbolic results. By comparing the symbolic results and path constraints obtained from fault-free and fault-injected machines, an input test pattern which distinguishes each bad machine from the good machine is derived. Finally, an experimental computer implementation of the major parts of the test generation algorithm is set up. Its performance is measured by several examples. The experiment demonstrates that the functional test generation technique is both practical and feasible. By using valuable skill developed in software testing for hardware testing, this technique is automation-oriented and hence provides a promising solution for the testing problems of modern VLSI systems.