The test and debug features of the AMD-K7/sup TM/ microprocessor
T.J. Wood · 2003
The time-to-volume and production manufacturing requirements drove the test methodology chosen for the seventh generation AMD x86 compatible processor. The use of embedded hardware to meet the test objectives includes considerations for debug support from wafer level test through systems level test. The use of ATPG to generate high stuck-at fault coverage tests was central to top-level design considerations of the AMD-K7/sup TM/ processor. Partitioning choices were also made to ensure ATPG produced tests could be enhanced with additional test sets targeting other fault models. This paper describes the design-for-test and design-for-debug features of the AMD-K7/sup TM/ microprocessor.