Scalable Parallel Utopia
Diane E. King, Lyndon Pierson · University of North Texas Digital Library (University of North Texas) · 1998
This contribution proposes a 128 bit wide interface structure clocked at approximately 80 MHz that will operate at 10 Gbps as a strawman for a 0C192C Utopia Specification. In addition, the concept of scalable width of data transfers in order to maintain manageably low clock rates is proposed.