Versatile beamforming ASIC architecture for broadband fixed wireless access
Ji-Ning Duan, Li-Jen Ko, Babak Daneshrad · 2003
This paper describes a highly flexible VLSI ASIC architecture targeted for use in present and future broadband fixed wireless access communication systems. The architecture features a novel structure for variable rate interpolation that allows it to operate at any user specified symbol rate from 625 kBaud to 10 MBaud. A unique shaping filter structure with programmable CSD coefficients is also implemented. The signal flow paths can also be reversed allowing the chip to be used in both the transmitter and the receiver portions of a communication system. Finally, anticipating operation in a TDMA network, all user programmable features can be quickly changed for each time slot.