Mixed signal behavioral verification using VHDL-AMS
C. Marino, M. Forliti, Alessandro Rocchi, Adolfo Giambastiani, F. Iozzi, M. De Marinis, Luca Fanucci · Research in Microelectronics and Electronics, 2005 PhD · 2005
In this paper we describe a methodology to set up a behavioral verification for complex mixed-signal System-on-Chip (SoC). The verification flow, consisting in VHDL-AMS modeling of the analog and mixed-signal section of a generic system, is depicted. This methodology has been successfully adopted for the top level debugging of a mixed signal SoC for sensor interface.