Enhanced BIST-based diagnosis of FPGAs via boundary scan access
C. Hamilton, Glenn A. Gibson, Sajith Wijesuriya, Charles E. Stroud · 2003
Four methods for accessing BIST for FPGAs via the IEEE 1149.1 standard boundary scan interface are presented and discussed in terms of advantages/disadvantages including their impact on test time and diagnostic resolution. These methods can be used in a variety of FPGA architectures for system level testing and diagnosis.