Versatile processor design for efficiency and high performance
Sotirios G. Ziavras · 2002
New architectural concepts are introduced for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D/sup 2/-CPU (Data-Driven processor) follows the natural flow of programs, minimizes the number of redundant operations, lowers the hardware cost, and reduces the power consumption. Instructions enter the processing unit when they are ready to execute or when all their operand(s) are to be available within a few clock cycles. This approach results in outstanding performance and elimination of large numbers of redundant operations that plague current processor designs. A comparative analysis of our design with conventional designs proves that it is capable of better performance and higher efficiency.