An energy-efficient single-chip FFT processor
Bevan M. Baas · 2002
A 1024-point single-chip Fast Fourier Transform (FFT) processor that employs algorithm, architecture, and circuit techniques to achieve an energy efficiency over 60x greater than the best known published processor, is presented. It is designed to operate at supply voltages less than 400 mV in a low threshold-voltage CMOS technology, and uses a unique "data-caching" memory architecture and "hierarchical bitline" memories to reduce power.