Design-for-test methodology for Motorola PowerPC/sup TM/ microprocessors
Magdy S. Abadir, Rajesh Raina · 2003
Testing of modern microprocessor designs remains a challenging problem. At Motorola's Somerset Design Center, we rely heavily on Design-For-Test (DFT) to address these challenges. To date our efforts have been very successful. This paper reviews our DFT methodology and how the DFT group is dealing with the new challenges that are facing PowerPC/sup TM/ microprocessor designs.