Realization of pipelined multiplier-free FIR digital filter
D.S. Dawoud · 1999
The paper introduces a high-speed multiplication-free realization for FIR filter. The realization is based on the use of a linear periodically time-varying (PTV) system and the use of radix-r recoding schemes for obtaining the filter coefficients. The paper combined and reformulated the Modified Booth multiplication algorithm and the filter operation in bit-level. As a result, two schemes are proposed. The structures can be used to build programmable FIR filter.