CMOS Realization of Online Testable Reversible Logic Gates
Dilip P. Vasudevan, Parag K. Lala, J.P. Parkerson · 2005
Three reversible logic gates that can be used to implement reversible digital circuits with various levels of complexity are proposed. The major feature of these gates is that they provide online-testability for circuits implemented using them. The CMOS realization of these gates is presented in this paper.