Low cost and high efficiency BIST scheme with 2-level LFSR and ATPT
Seung-Moon Yoo, Seong‐Ook Jung, Sung-Mo Steve Kang · 2002
In this paper, a new test pattern generator with a 2-level LFSR and a fast pattern transferring method for the scan-based BIST structure are proposed. XOR input paths in the 2-level LFSR scheme are changed by counter outputs to generate less linear-dependent and auto-correlated test patterns for better fault coverage. Test patterns are transferred into the scan chain by using an asynchronous internal high frequency clock to reduce test time.