Multiplication by an integer using minimum adders
Andrew Graham Dempster, M.D. Macleod · 1994
A graph representation of multiplier blocks has been described by Bull and Horrocks (IEEE Proc.G. vol.138, no.3, p.401-12, June 1991) for the design of finite impulse response (FIR) digital filters. This graph representation is applied to the problem of reducing the number of adders in a constant integer multiplier.