Integrated approach to area-time tradeoff for built-in-self-test in VLSI circuits
A. Basu, T.C. Wilson, D.K. Banerji, Jayanti C. Majithia · 2002
The authors address the issue of area-time trade off in VLSI circuits using the BILBO methodology of BIST. The issue has been dealt with in an integrated manner. Two distinct approaches, integer linear programming and graph theoretic have been presented.>