Testing a switching memory in a telecommunication system
S. Barbagallo, Fulvio Corno, P. Prinetto, Matteo Sonza Reorda · 1995
The paper describes the approach followed for testing a real circuit produced by Italtel. Both on-line and off-line testing are considered and the performance and area overheads are taken into account to meet the constraints imposed by the circuit customers. BIST is adopted to test some embedded memories, and boundary scan is exploited to activate the test and gather the results. Particular care is taken to minimize the additional logic, by using the same circuitry for both on-line and off-line testing.