A 34-MFLOP 32-bit CMOS floating point processor
Song-Tine Wang, Chi-Suan Wang, Morries Wang, Shyh-Rurong Wang, Jhy-Kun Wang, Ching-Lu Hon, Row-Ming Yang, W. Chuang, Te-Tsoung Tsai, Ming-Yuan Jang, Gwo-Jeng Pun · International Symposium on VLSI Technology, Systems, and Applications · 2003
A 34-MFLOP 32-bit floating-point processor in 2- mu m CMOS technology is presented. In order to achieve the high speed of floating-point operation, the authors use such techniques as hierarchical design parallel circuits, and a three-stage pipeline that has been optimized with equal delay in each stage. It is shown that the CIC81232Y (multiplier) and CIC81233Y (arithmetic and logic circuit) are fully compatible with WTL1232 and WTL1233 in function, but the speeds are 1.7 times faster.>