A RAM-based neural network architecture for wafer scale integration
Hamid Bolouri, Paul Morgan, C. Peacock · 2002
The paper presents the design of a RAM-based Artificial Neural Network (ANN) architecture which is particularly well suited to WSI implementation. Using data from a VLSI test chip and prototype system manufactured in 1993, we compare the performance and complexity of FPGA, VLSI and WSI RAM-based neural systems.