A self-timed, fully-parallel content addressable queue for switching applications
Jason Edward Podaima, Glenn Gulak · 2003
A self-timed, fully-parallel content addressable queue (CAQ) memory replaces traditional means of implementing pointer-based queuing in switching systems. A 16.5 Kb CAQ test device implemented in 0.8 /spl mu/m CMOS, asynchronously performs four memory operations per clock cycle. Test results indicate a maximum operating frequency of 40 MHz.