Higher certainty of error coverage by output data modification
Y. Zorian, V.K. Agarwal · International Test Conference · 1984
With the increasing interest in Built-In-Testing, new approaches which can provide better error coverage than the conventional polynomial division (that is, multi-input LFSR) schemes are being developed. In this paper, a completely new approach is described which provides tremendous improvement in the error coverage with little additional silicon area on the Chip-Under-Test. The new scheme works with the scan concept, and is applicable to any general circuit.