Efficient techniques for multiple fault test generation
Seiji Kajihara, Rikiya Nishigaya, T. Sumioka, K. Kinoshita · 2002
This paper presents techniques used in combinational test generation for multiple stuck-at faults using the parallel vector pair analysis. The techniques accelerate test generation and reduce the number of test vectors generated, while higher fault coverage is derived. Experimental result for benchmark circuits shows the effectiveness of using the techniques.>