Efficient DSP Architecture for High-Quality Audio Algorithms
Suk Hyun Yoon, Jong Ha Moon, Myung Hoon Sunwoo · 2005
This paper presents specialized DSP instructions and their hardware architecture for high-quality audio algorithms, such as the MPEG-2/4 advanced audio coding (AAC), Dolby AC-3, MPEG-2 backward compatible (BC), etc. The proposed architecture is specially designed and optimized for the IMDCT (inverse modified discrete cosine transform), and Huffman decoding in the AAC decoding algorithm. Performance comparisons show a significant improvement compared with TMS320C62/spl times/ and ASDSP21060 for the IMDCT computation. Furthermore, the dedicated Huffman accelerator performs the decoding process in only one cycle. The proposed DPU (data processing unit) consists of 107,860 gates and achieves 150 MIPS.