Predicting failing bitmap signatures for memory arrays with critical area analysis
Julie D. Segal, Tuan Minh Ho, B. Hodgkins, P. Misic, Jingzhi Lin, M. Yegnashankaran · 2003
Using in-line defect data, critical area analysis of cell layout, and a rule-based algorithm to associate critical areas with electrical faults, we can predict failing bitmap signatures and their frequencies for any memory circuit. The technique is demonstrated using a 0.25 /spl mu/m SRAM technology. Results can be used for test optimization, redundancy planning, yield prediction, and determining process steps responsible for yield loss.