Hardware implementation of a multiprocessor system controlled by Petri nets
F. Anzai, Naoto Kawahara, T. Takei, Toru Watanabe, Hideki Murakoshi, T. Kondo, Yasunori DOHI · 2002
We report an implementation and evaluation of a multiprocessor system controlled by Petri nets. We design a hardware model for the multiprocessor system by using hardware description language (HDL). The system consists of a Petri net controller, some processor elements and buses. We also design the Fire Unit which checks whether the transitions can be fired or not on the gate-array. It can operate in three clocks to check and fire a transition. Furthermore, we evaluated performance of the implementation of the proposed system when applied to robot arm control. This system can control very fast processes characterized by the time as small as 10 micro-seconds.>