AVS 3D Real-time Decoder Design and Implementation Based on FPGA/SoC Platform
Peng-fei Ren, Hongyang Yu · Advances in intelligent systems research/Advances in Intelligent Systems Research · 2015
AVS(audio video coding standard)Group formulates stereo-packing scheme aimed at 3D video.In this paper, based on stereo-packing algorithm, using FPGA hardware accelerate module to parse the stereo-packing ES stream syntax element and cooperating with the Xilinx ZYNQ 7020 SoC development board ,we complete the AVS 3D decoder on FPGA/SoC Co-platform.Using HDMI port to export the decoded data to the 3D display device, we get the 3D video with depth information and verify the validity of AVS 3D real-time decoder.