A System Solution for High-Performance, Low Power SDR
Yuan Lin, Hyunseok Lee, Yoav Harel, Mark Woh, Scott A. Mahlke, Trevor Mudge · 2005
One central challenge in the realization of Software De-fined Radio (SDR) is to provide a programmable solution that meets the challenging high-performance, low-power requirements, while providing an efficient software devel-opment interface. In this paper, we present an overview of a fully programmable multi-core SIMD architecture for SDR. Our solution can support 2Mbps W-CDMA at about 270mW, and 24Mbps 802.11a at about 370mW in 90nm technology. This high computational efficiency is achieved by exploiting the vector characteristics of the algorithms, through a unique multi-core architecture that consists of tightly coupled scalar and wide SIMD pipelines. In addi-tion, we present a software design flow that supports effi-cient DSP programming and implementation through a set of signal processing extensions to C, referred to as SPEX. 1