A modified microprogramming control for FPU
Zheng Liang, Shen Xu-Bang, Wang Xiaoji · 2002
A novel architecture and control of the FPU LSC87 chip, which is instruction compatible with INTEL 8087 coprocessors, is described. The modified microprogramming control presented here is best suited for complicated processes, including the supporting of 7 floating point numbers and binary or decimal integers, the implementation of IEEE standard 754 floating point arithmetic, as well as the computation of transcendental functions, especially the 6 internal exceptions affected by the execution of LSC87 instructions and the corresponding masked and unmasked exception handling. To accelerate the execution of computation instruction, the hardwired control is combined with a microprogramming approach. The control unit completed in LSC87 simplifies the architecture design, expedites FPU development and saves area cost.