A programmable motion estimation processor for full search block matching
Alain Pirson, F. Yassa, P. Paul, B. Canfield, F. Rominger, A. Graf, Detlef Teichner · 2002
Describes a programmable motion estimation processor applying a block matching technique on large search windows. Developed in the context of an MPEG-2 video encoder, its use can be extended to any application where fast motion estimation is required. Its high performance (17 Gops peak) and its ability to work in parallel make it ideal for real time applications like video compression. The block matching processor (BMP) consists of a CPU associated with several specific units including a fast motion estimator, a DRAM interface, IO ports and some on-chip memory. This approach allies the flexibility of a CPU to the efficiency of dedicated hardware. A DRAM controller minimizes the impact of data transfer on the computing power.