Architecture and applications of a 100-ns CMOS VLSI digital signal processor
S. Abiko, M. Hashizume, Y. Matsushita, K. Shinozaki, T. Takamizawa, C. Erskine, S.S. Magar · 2005
This paper describes the architecture and applications of a monolithic programmable CMOS VLSI Digital Signal Processor. The processor is based upon the architecture of its predecessor, TMS32020. The processor, which has 544 × 16 bit RAM and 4K × 16 ROM, executes instructions at a rate of 10 Million instructions per second.