Concurrent analogue fault simulation
Mark Zwoliński, Andrew D. Brown, C.D. Chalk · ePrints Soton (University of Southampton) · 1997
The research described in this paper is an investigation of algorithmic methods for the efficient fault simulation of analogue circuits. In particular, by simulating a number of faulty versions of a circuit concurrently with the fault-free version, those parts of a faulty circuit that behave in the same way as the fault-free circuit at any instant in time are not reevaluated, thus saving computational effort. The approach described here is analogous to and potentially compatible with concurrent digital fault simulation.