0.8 V CMOS content-addressable-memory (CAM) cell circuit with a fast tag-compare capability using bulk PMOS dynamic-threshold (BP-DTMOS) technique based on standard CMOS technology for low-voltage VLSI systems
E. Shen, James B. Kuo · 2003
This paper reports a novel 0.8 V content addressable memory (CAM) cell circuit with a fast tag-compare capability using the bulk PMOS dynamic-threshold (BP-DTMOS) technique based on standard CMOS technology following the SOI DTMOS technology for low-voltage VLSI systems. Using four PMOS devices with their body controlled dynamically in the tag-compare portion, this CAM cell, which is built in standard bulk CMOS technology using the BP-DTMOS technique, has a faster tag-compare operation at a supply voltage of 0.8 V as compared to the one not using the BP-DTMOS technique.