Implementation of Five Port Router Architecture Using VHDL
Priti B. Domkondwar, D.S. Chaudhari · International journal of advanced research in computer science and electronics engineering · 2012
Technology scaling continuously increasing number of component and complexity for System on Chip systems [1]. For effective global on-chip communication, on-chip routers provide essential routing functionality with low complexity and relatively high performance [1]. The low latency and high speed is achieved by allowing routing function for each input port and distributed arbiters which gives high level of parallelism [4]. This paper will provide an Design and implementation of on-chip router architecture.