Neuro-chip: an analog approach to an artificial adaptive neural network
Leonardo Maria Reyneri, Eros Gian Alessandro Pasero, P. Bargero, G. Pignari, G. Subiaco · 1989
Describes a silicon implementation of an artificial neural network using analog techniques. The problems arising during chip design are analysed and it is seen how the constraints on the accuracy provided by an analog implementation can be relaxed by a proper selection of the learning rule. A chip containing an array of 32 neurons with 32 inputs is actually under development.