Fault detection enhancement in cache memories using a high performance placement algorithm
Hamid Reza Zarandi, Seyed Ghassem Miremadi, Hamid Sarbazi‐Azad · International On-Line Testing Symposium · 2004
The data integrity of words coming out of caches needs to be checked to assure their correctness. This paper proposes a cache placement scheme, which provides high performance as well as high fault detection coverage. In this scheme, the cache space is divided into sets of different sizes. Here, the length of tag fields associated with each set is unique and is different from the other sets. The other remained bits of tags are used for protecting the tag using a fault detection scheme e.g., generalized parity. This leads to protection of the cache without compromising performance and area with respect to the similar fully associative cache. The results obtained from simulating some standard trace files reveal that the proposed scheme exhibits a performance near to fully associative but achieves a considerable fault detection coverage which is suitable for use in dependable computing.