A Generic Framework for Rapid Prototyping of System-on-Chip Designs.
Dmitrij Kissler, Alexey Kupriyanov, Frank Hannig, Dirk Koch, Jürgen Teich · CDES · 2006
The integration of different Intellectual Property (IP) cores to modern System-on-Chip (SoC) designs becomes more and more an important topic because of the benefits in the overall system performance and the design costs. In this paper we present a new generic framework consisting of a graphical user interface with an extendable highly parameterizable IP component library for convenient SoC architecture entry, as well as software tools, which provide an automatic generation of fast cycle-accurate simulators for verification purposes and synthesizable HDL code for hardware synthesis. Because the communication of the single IP cores also plays an important role, our IP core library includes an open-source bus component, which is used in a case study design.