Research of Precise Timing on Android Devices
Liu-yu-qin Deng, Hong-Liu Cai, Caisen Chen, Ting-mei Xue, Xi Yu · Advances in computer science research · 2015
Precise timing is an extremely important part in the cache timing attack.We usually use the time stamp counter (TSC) to timing the cache access on the x86 platform.To overcome the differences between the ARM platform and x86 platform, we show in this paper about how to implement precise cache timing on Android devices by using the cycle counter register (CCNT register), which is a part of the performance-monitor register (PMR).To show the timing result directly on the device screen, wemade an android application. ForewordCache timing attack is one of the side channel attack, this kind of attack has been proved to be efficient to RSA, AES encryption [1][2] .But most of the cache timing attack achievement is about the PC(x86 platform), the cache timing attack based on the mobile devices just started in the recent years.With the rapid development of mobile internet, the security of the mobile devices with arm processor is more and more important now.So in this article we focused on the differences between the x86 processor cache and arm processor cache and made some conclusion about it.The rest of the paper is organized as follows: Section II described related work.In Section III we discussed how we have investigated the method to precise timing on ARM devices.Section IV we have implemented the method in section III and showed the experiment results.In section V we concluded the paper.