Prioritized arbitration for input-queued switches with 100% throughput
Rainer Schoenen, Guido Post, Gerald Sander · 2003
Input buffered switches are known to suffer from head-of-line (HOL) blocking that limits the throughput to approximately 58.6%. It has been shown that 100% throughput can be achieved with virtual output queueing (VOQ) and an arbitration algorithm that controls the access to the switch fabric in each time slot. No weight-dependent algorithm was known that supports priorities, which are necessary for the isolation of connections with different QoS requirements in ATM or IPv6 switches. In this paper we show how a weighted matching can be extended to support priorities in order to separate CBR, VBR and ABR traffic. The number of bits per priority is exposed as the main parameter. Based on simulation results the priority performance is evaluated for the ideal algorithm and an approximation SIMP which offers a delay performance close to the ideal maximum weight matching.