Sequential circuit synthesis at the gate level
Ellen M. Sentovich, Robert K. Brayton · 1993
Sequential Circuit Synthesis at the Gate Level by Ellen Marie Sentovich Doctor of Philosophy in Electrical Engineering and Computer Sciences University of California at Berkeley Professor Robert K. Brayton, Chair Sequential circuit synthesis is the process of automatically generating an optimal implementation of a sequential circuit given a high-level or gate-level description. Optimization of a sequential circuit design may be performed at either the state transition graph level or the gate level. The published work to date has favored the state transition graph level because it allows one to reason easily about input/output sequences; however, the impact of optimization at this level is hard to quantify. The gate-level view is important for several reasons: it provides a direct measure of the quality of the final implementation; all sequential designs must eventually be implemented at the gate level; given a gate-level description it is usually computationally impractical to extract ...