PARTITIONING AND LATENCY EXPLOITATION IN THE TIME DOMAIN ANALYSIS OF LARGE ELECTRONIC CIRCUITS
P. Linardes · University of Southampton · 1979
This thesis deals with the Transient Analysis of Large Nonlinear Dynamic Circuits using computer methods.The computational demands for the analysis, computation time and computer memory required, increase significantly as the size of the analysed circuits increases.To minimize the computational effort Kron's branch tearing method and Sparse Matrix Techniques have been developed.In contrast with the branch tearing method, the use of a node tearing method is proposed here.