An Alternative to Scan Design Methods for Sequential Machines
Saluja, Dandapani · IEEE Transactions on Computers · 1986
The problem of testing sequential machines using a checking experiment is investigated. An algorithm is given to augment sequential machines by adding extra input(s) to make them testable. We also present a circuit modification method, similar to scan methods, such that the augmented machine can be tested by the checking experiment. A justification of our method for a VLSI environment is given by determining the overheads.