Pipelining of IIR digital filters
Kazys Kazlauskas · 1996
In this paper, we propose to present the direct fonn recursive digital filter as a state space filter. Then, we apply a look-ahead technique and derive a pipelined equation for block output computation. In addition, we study the stability and multi plication complexity of the proposed pipelined-block implementation and compare with complexities of other methods. An algorithm is derived for the iterative computation of 1. Introduction. Digital filter transfer function theoretically can be realized in an infinite number of ways. From the standpoint of implementation, some structures may be of lower complexity, while others may be pipelinable, and yet some others may consist of regular modules that can save design time. Much research has been carried out in search of different realization structures with various desirable properties and enhanced performance. Achieving high speed in recursive direct-form filters is difficult because of the feedback loop (Chung and Parhi, 1994). High performance in very large scale integration (VLSI) circuits can be achieved by using high speed technologies without modifying the algorithm. On the other hand, we can use a low cost technology and gain an impressive performance by exploiting concurrency. Concurrent structures can be derived by implementing the existing algorithms in new ways. We do not change the transfer function of the filter, but we do change the internal structure of the filter (Parhi and Messerschmitt, 1989). Pipelining and block processing are two of several algorithmic transformation techniques that can be used to exploit the concurrency within a digital signal processing algorithm to improve its operat ing speed or reduce the number of resources required in a parallel processing environment (Lucke and Parhi, 1994). Pipelining (Chung and Parhi, 1994; Parhi