Efficient use of communications between an FPGA's embedded processor and its reconfigurable logic
Joshua Noseworthy, Miriam E. Leeser · 2006
Abstract — Increasing device densities allow chip manufacturers to integrate more functionality onto a single piece of silicon. FPGA manufacturers, such as Xilinx and Altera, use these additional resources to further diversify and improve the processing capabilities of their architectures. One of the more recent architectual enhancements that has been made to Xilinx’s Virtex family architecture is the introduction of the PowerPC405 hard-core embedded processor. In this paper we present a Software Defined Radio Application that serves as a vehicle for investigating effective communications between the PowerPC405 Processor and the surrounding FPGA fabric.. A challenging aspect of developing applications that target the PowerPC is the interfacing of the processor with the surrounding reconfigurable logic. We have implemented a dozen different versions of a Software Defined Radio (SDR) application to exercise the various interfaces that enable communication between the processor and the surrounding FPGA fabric. The implementations differ only in the interfaces used. Our results indicate that the performance of the SDR application application can be increased by as much as 60 percent just by choosing the interfaces that are most appropriate for the different types of data in the implementation. This demonstrates that the performance of FPGA applications that use the embedded processor are dramatically effected by the mechanisms chosen to enable communication between the processor and its surrounding resources. I.