Using genetic algorithms for scheduling data flow graphs
Ljm Luc Cluitmans · 1992
Trefw.: IC's en CAD / optimalisering (informatica) en A Silicon Compiler is a program (or set of programs) that translates an abstract behavioral description of a chip into a chip layout. The first main section of a Silicon Compilation system is called High Level Synthesis. It translates the behavioral description (given as a set of operations and their time precedences) into a controller description and a network of functional building blocks with their interconnections. Finding the number of functional building blocks to be used is called allocating. Assigning operations to functional building blocks is called binding. Assigning timeslots to each operation is called scheduling. In allocating, scheduling and binding, the target is usually to minimize the area of the used functional building blocks or to minimize the number of timeslots used. The problem of optimally performing these three tasks is often called a scheduling problem. A program that solves a scheduling problem is called a scheduler. In this thesis a scheduler is described that uses a genetic algorithm to perform the optimization. Internally it uses a (resource constrained) list scheduler in the process of representing