A performance comparison of several superscalar processor models with a VLIW processor
John Lenell, Nader Bagherzadeh · 2002
This paper quantitatively compares various superscalar processor architectures with a very long instruction word architecture developed at the University of California, Irvine. The motivation for this comparison is to study the capability of a dynamically scheduled processor to obtain the same performance achieved by a statically scheduled processor, and examine the hardware resources required by each.>