Multiplierless realization of recursive digital filters
M. Bhattacharaya, T. Saramäki, Jaakko T. Astola · 2002
It is observed that by designing a filter with marginally stricter specifications than the desired one without any increase in order, i.e., length of the filter, a multiplierless implementation of recursive filters is feasible utilizing some class of low sensitivity structure. These implementations are not associated with an increase in the order of the filter that involves more shift registers, data paths, control circuits, etc., and, hence, an increase in complexity, i.e. indirect overheads. The approach appears to be especially suitable for filters with high sensitivity. In low sensitivity structures the modified coefficients can be realized with multipliers of shorter wordlength, i.e., in fewer bits. When these are implemented in minimum numbers of signed powers of two (MNSPT) form, we have a multiplierless implementation.