Bit-Width Optimization by Divide-and-Conquer for Fixed-Point Digital Signal Processing Systems
Jaeyong Chung, Lok-Won Kim · IEEE Transactions on Computers · 2015
This paper presents a novel approach to fractional bit-width optimization of fixed-point designs. We first propose a divide-and-conquer algorithm that can assign optimal fractional bit-widths to a special class of designs that does not have reconvergent paths starting from an internal signal. General designs are partitioned into designs of that special class and our algorithm is applied to each design. The algorithm recursively breaks down a given design into sub-designs and finds Pareto optimal solutions to each sub-design. Those solutions are merged to form Pareto optimal solutions to a larger design. In addition, two pruning methods based on area and error, respectively, are proposed, speeding up the algorithm. The optimization process is guided by static maximum absolute error analysis, and functional correctness is guaranteed for all possible input stimuli. Our approach is demonstrated in five case studies including polynomial approximation and RGB-to-YCbCr conversion, for which the divide-and-conquer algorithm produces the optimal solutions.